1. Field of the Invention
The present invention relates to a semiconductor device in which a thickness of an energy barrier of a Schottky junction is modulated by an electric field of an insulated gate electrode to control a tunnel phenomenon, thereby controlling a main current.
2. Description of the Background Art
In FIGS. 1 to 6, there is shown a conventional semiconductor device such as a Schottky tunnel transistor, in which a thickness of an energy barrier of a Schottky junction is modulated by an electric field of an insulated gate electrode to control a tunnel phenomenon, thereby controlling a main current, as disclosed in Japanese Patent Laid-Open Specification No. 62-274775.
As shown in FIG. 1, an n.sup.+ -type drain region 2 is formed in the surface area of an n.sup.- -type silicon semiconductor substrate 1, and apart from the drain region 2 a Schottky metal 4 for acting as a source region is also embedded in the surface area of the substrate 1 so as to form a Schottky junction between the substrate 1 and the Schottky metal 4. A gate electrode 8 is formed on the surface of the substrate 1 via a gate insulating film 5 formed thereon between the drain region 2 and the Schottky metal source region 4. In this case, the barrier thickness of the Schottky junction 3 formed between the substrate 1 and the Schottky metal source region 4 in the direction perpendicular to the surface of the substrate 1 is modulated by the electric field of the gate electrode 6 to control the tunnel current, as hereinafter described in detail. An insulating film 7 is formed on the gate electrode 6 and the surface of the substrate 1 so as to cover these members, and source and drain electrodes 8 and 9 arc attached to the source and drain regions 4 and 2, respectively, and arc separated from the gate electrode 6.
In FIGS. 2a to 2d, there is shown a method for producing a Schottky tunnel transistor shown in FIG. 1.
In FIG. 2a, an ion implantation of an n-type impurity is effected in the surface area of an n.sup.- -type silicon semiconductor substrate 1 using a photoresist mask (not shown), and then a heat diffusion of the implanted impurity is carried out to form an n.sup.+ -type drain region 2 in the surface area of the substrate 1. As shown in FIG. 2b, a hollow 10 is formed in the surface area of the substrate 1 by a photo etching. In FIG. 2c, the hollow 10 of the substrate 1 is filled up with a Schottky metal 4 such as tungsten by a selective growth. Then, a silicon oxide (SiO.sub.2) film as a gate insulating film is formed over the surface of the substrate 1, and a conductive polycrystalline silicon film is formed on the silicon oxide film. The obtained laminate layer composed of the silicon oxide and the polycrystalline silicon films is patterned by the photo etching to obtain a gate electrode 6 on the surface of the substrate 1 between the drain region 2 and the Schottky metal source region 4 so that the barrier thickness of the Schottky junction 3 formed between the substrate 1 and the Schottky metal source region 4 in the direction perpendicular to the surface of the substrate 1 may be modulated to control a tunnel current by the electric field of the gate electrode 6. In FIG. 2d, an insulating film 7 is formed on the gate electrode 6 and the surface of the substrate 1 so as to cover these members 6 and 1, and then contact holes 7a for providing drain and source electrodes on the drain and source regions 2 and 4 are opened in the insulating film 7 by the photo etching. Then, source and drain electrodes 8 and 9 are formed on the drain and source regions 2 and 4 in the contact holes 7a of the insulating film 7 using vapor deposition and patterning, thereby obtaining a Schottky tunnel transistor shown in FIG. 1.
In FIGS. 3a to 3d, there are shown energy band structures of a surface portion of the semiconductor substrate 1 near the gate insulating film 5 of the semiconductor device shown in FIG. 1.
As shown in FIG. 3a, when both gate voltage V.sub.G and drain voltage V.sub.D are zero, the thickness of the Schottky barrier is thick, and thus there is no electron flow between the drain and the source. In FIG. 3b, when V.sub.G =zero and V.sub.D &gt;zero, a reverse bias voltage is applied to the Schottky junction 3, and no electron flows between the drain and the source in a similar manner to that shown in FIG. 3a. In FIG. 3c, when V.sub.G &gt;zero and V.sub.D &gt;zero, a certain positive voltage is applied to the gate electrode 6, and the thickness of the Schottky barrier is modulated by the electric field of the gate electrode 6 and is reduced to a thickness value W. Hence, electrons flow from the Schottky metal 4 to the semiconductor substrate 1 through the Schottky junction 3 therebetween by the tunnel effect, and thus a tunnel current flows from the drain region 2 to the Schottky metal source region 4 through the Schottky junction 3. In FIG. 3d, when V.sub.G =zero and V.sub.D &lt;zero, a forward bias voltage is applied to the Schottky junction 3. As a result, a lot of electrons can move from the semiconductor substrate 1 to the Schottky metal 4, and the electric current flows therebetween in the forward-direction.
As described above, the condition where the tunnel current can flow through the Schottky barrier is as follows. That is, the thickness W of the Schottky barrier in FIG. 3c, i.e., the distance between the junction (vertical line) in the energy band illustration and the crossing between the Fermi level and the lower end line of the conductive zone inclined by the electric field of the semiconductor substrate 1, is approximately 100 .ANG.. In the semiconductor device shown in FIG. 1, the electric field of the gate electrode 6 gives such an affection to the Schottky junction 3 in a range of at most 1000 .ANG. in depth from the surface of the substrate 1.
In the process for forming the hollow 10 in the silicon semiconductor substrate 1, when the isotropic etching is effected using a photoresist etching mask 11, the cross section of the side wall of the hollow 10 is as shown in FIG. 4a, and when the anisotropic dry etching is effected, the cross section of the side wall of the hollow 10 is as shown in FIG. 4b. In these cases, the Schottky junction 3 contacts with the semiconductor substrate 1 at an angle of approximately 90.degree. with respect to the surface of the substrate 1 in the range of approximately 1000 .ANG. in depth.
FIG. 5a is an enlarged schematic view illustrating the electric field spreading from the gate electrode 6 to the Schottky junction 3 via the gate insulating film 5 in the connection portion between the gate insulating film 5 and the Schottky junction 3 of the Schottky tunnel transistor which is prepared via the hollow etching step shown in FIG. 4a or 4b. In FIG. 5a, O is a contact point between the end of the Schottky junction 3 and the lower surface end of the gate insulating film 5, and A is a point on the Schottky junction 3 at a distance r away from the point O. The distance r represents the range of the Schottky junction 3 being affected by the electric field of the gate electrode 6. B is a point on the interface between the silicon semiconductor substrate 1 and the gate insulating film 5 at the distance r away from the point O, and C is a point where the vertical line standing from the point B intersects the upper surface of the gate insulating film 5.
Now, when a depletion layer is formed in the vicinity of the Schottky junction 3, as shown in FIG. 3c, electric line force extends from the gate electrode 6 to the Schottky junction 3 along the line CBA, as shown in FIG. 5a, i.e., along the arcuate line BA around the point O in the silicon semiconductor substrate 1. In fact, this electric line force is affected by a relatively weak electric field of the n.sup.+ -type drain region 2, which, however, can be ignored for explaining the principle of the Schottky tunnel transistor.
Assuming that the length of the arc BA is L=.pi..multidot.r/2, the energy band structure along the line CBA in FIG. 5a is shown in FIG. 5b, wherein .phi.B is a height of the Schottky barrier and dox is a thickness of the gate insulating film 5. In the silicon semiconductor substrate 1, since the depletion layer is formed in the vicinity of the Schottky junction 3, the following equation is obtained from Polsson's equation, EQU d.psi./dX=-q.multidot.N.sub.D /.xi.Si (1)
wherein .psi. is a potential, X arc coordinates on a segment AB whose direction extending from the point A to the point B is defined as positive, q is an electric charge, .xi.Si is a dielectric constant of the silicon semiconductor substrate 1, and N.sub.D is a donor density of the n-type silicon semiconductor substrate 1.
In FIGS. 5a and 5b, the following equation is obtained at the point B from the law of constant electric flux, EQU .epsilon.OX.multidot.Eox=.epsilon.Si.multidot.ESi (2)
wherein .epsilon.ox is a dielectric constant of the gate insulating film 5, Eox is electric field in the gate insulating film 5, and ESi is electric field in the silicon semiconductor substrate. Then, assuming that the electric field at the point B is Vs, the following equation is obtained: EQU Eox=(V.sub.G -V.sub.S)/dox (3)
From the above described equations (1) (2) (3), the thickness W of the Schottky barrier can be obtained when a tunnel current flows. When the gate voltage V.sub.G, the thickness dox of the gate insulating film 5 and the donor density N.sub.D are constant, the thickness W of the Schottky barrier can be expressed as a function of the length L of the arc BA. When the length L is small near the point O, the voltage is large, and the thickness W becomes small. Hence, a tunnel current having a large current density flows. On the other hand, when the length L is large away from the point O, the thickness W is large, and the current density of the tunnel current is rapidly reduced.
As described above, the thickness W of the Schottky barrier is approximately 100 .ANG. when the tunnel current starts to flow through the Schottky junction. Therefore, now, when the thickness W of the Schottky barrier is 100 .ANG. at the constant values of V.sub.D and V.sub.G, the length of the line BA is defined to L, and the section OA of the Schottky junction 3 is a channel equivalent region which is referred to as a "channel" region of the Schottky tunnel transistor.
In FIG. 6, there is shown a characteristic curve representing a relation between a thickness W of the Schottky barrier and a tunnel current density when the height .phi.B of the Schottky barrier is 0.6 eV. From FIG. 6, it is readily understood that as the thickness W of the Schottky barrier is reduced, the current density of the tunnel current is rapidly increased.
In a conventional Schottky tunnel transistor, the angle formed by the Schottky junction 3 constituting the channel region and the electrode surface (lower surface) of the gate electrode 6 or the lower surface of the gate insulating film 5 having a uniform thickness, i.e., the angle AOB defining the corner of the silicon semiconductor substrate 1 between the Schottky junction 3 and the gate insulating film 5 in FIG. 5a is approximately 90.degree., and thus the channel region can not be sufficiently large. Hence, a large current capacity can not be obtained.